Cypress Semiconductor /psoc63 /SMIF0 /DEVICE[1] /WR_DUMMY_CTL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as WR_DUMMY_CTL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SIZE50 (PRESENT)PRESENT

Description

Write dummy control

Fields

SIZE5

Number of dummy cycles (minus 1): ‘0’: 1 cycles … ‘31’: 32 cycles.

PRESENT

Presence of dummy cycles: ‘0’: not present ‘1’: present

Links

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